XCKU095-2FFVA1156I

XCKU095-2FFVA1156I  is an ideal choice for packet processing and DSP intensive functions, suitable for various applications ranging from wireless MIMO technology to Nx100G networks and data centers.

characteristic

Programmable System Integration

Using second-generation 3D ICs, the system logic units can reach up to 1.5 million

Multiple integrated PCI Express ®  Gen3 kernel

Higher system performance

8.2 TeraMAC's DSP Computing Performance

High utilization rate, speed can be increased by up to two levels

16G supports backplane transceivers, with up to 64 per device

2400Mb/s DDR4, capable of stable operation under different PVT conditions

Economically efficient

12.5Gb/s transceiver at the slowest speed level

Medium speed 2400Mb/s DDR4

Integrating VCXO reduces the cost of clock components

Total power consumption reduction

Compared to the previous generation product, power consumption can be reduced by up to 40%

Implementing fine-grained clock gating similar to ASIC through UltraScale devices

Enhanced system logic unit encapsulation reduces dynamic power consumption

Accelerate design efficiency

With Virtex ®  UltraScale device script compatibility for scalability

With Vivado ®  Collaborative optimization of design suites enables quick completion of designs