HI-6131PQM

The characteristics of HI-6131PQM mainly include the following aspects:

Interface Function: HI-6131PQM provides a complete interface between the main processor and MIL-STD-1553B bus, supporting single or multi-functional operations. Each IC contains a bus controller (BC), a bus monitoring terminal (MT), and two independent remote terminals (RT), which can operate concurrently. ‌

Communication Protocol: Supports MIL-STD-1553B and MIL-STD-1760 communication protocols, with BIPH-LEVEL (MANCHESTER) data encoding/decoding method and a maximum data transmission rate of 0.125 MBps2. ‌

Host interface options: Two host interface options are provided, including 16 bit parallel bus and 4-wire serial peripheral interface (SPI), to meet the needs of different applications1. ‌

Internal resources: Users can allocate 64K bytes of on-chip static RAM between devices to meet application requirements. In addition, programmable interrupts are provided to provide terminal status to the host processor, as well as a circular data stack 1 with flip and programmable "reach level" interrupts. ‌

Configuration and self-test: HI-6131PQM can be configured to automatically self initialize after reset and has a dedicated SPI port to read data from external serial EEPROM, in order to fully configure registers and RAM for any subset of one to four terminal devices. In addition, it also has built-in self-test functions for protocol logic, digital signal paths, and internal RAM. ‌

Electrical and physical characteristics: The operating voltage of HI-6131PQM is 3.3V, packaged in PQFP64, with ± 8kV ESD protection (HBM, all pins), supports two temperature ranges: -40 ° C to+85 ° C, or -55 ° C to+125 ° C (optional aging), and complies with RoHS lead-free option 13. ‌

Application areas: HI-6131PQM is widely used in MIL-STD-1553 terminals, including flight control and monitoring, ECCM interfaces, store management, sensor interfaces, testing equipment, and instruments